With today’s IC technology approaching the edge of the Moore’s law, it is emerging to obtain execution speed-ups by applying different methods rather than future clock speed increases. The execution time can be improved by exploiting the parallelism inherent in the binary code, i.e. Instruction Level Parallelism (ILP) [3]. In such a way, designing a new architecture from scratch and recompilation of the existing code (written and tested for years) can be avoided. The Scalable Compound Instruction Set Machine (SCISM) [6] organization addresses this problem by analyzing the instruction dependencies at execution time and by compounding them together for parallel execution according to a pre-defined categorization based on hardware utilization rather than opcode description. The main SCISM advantage is that it provides a design that remains binary compatible with the original instruction set architecture. This paper introduces SCISM software simulator able to read, translate and simulate parallel execution of IA-32 legacy code. The main goal is to provide a tool for easy exploration of the parallelism present in the native IA-32 binary code. The SCISM simulator is (open source) software project written in C++ under Linux. The compounding rules and all additional information, e.g. ISA description, hardware implementation 1 details etc., are provided through a set of plain text configuration files that can be easily modified. Preliminary results suggest that performance gains of about 30 % are feasible. Keywords—ILP, binary translation, SCISM.


4 Figures and Tables

Download Full PDF Version (Non-Commercial Use)